Indian Institute of Science (IISc) Designing next generation analog chipsets for AI applications
IISc researchers have created a design framework for the creation of next-generation analogue computing chipsets
which may operate quicker and with less power than the digital chips used in the majority of electronic gadgets.
The group has created a prototype of an analogue chipset named ARYABHAT-1 using their innovative design framework
This kind of chipset can be particularly beneficial for AI-based applications like object or speech recognition or those that demand extremely fast, massively parallel computing processes.
Digital chips are used in the majority of electronic devices, especially those that require computers, because the design process is straightforward and scalable.
"But analogue has a significant edge. You will experience a tenfold increase in size and power "explains Chetan Singh Thakur, an assistant professor in the Department of IISc
whose lab is in charge of developing the analogue chipset
Analog computing has the potential to perform better than digital computing in applications that don't call for accurate computations because the former is more energy-efficient.
When building analogue chips, there are various technological challenges to solve
Analog processor testing and co-design are challenging, in contrast to digital chips
By compiling a high-level code, it is simple to create large-scale digital processors, and the same architecture may be transferred
transferred with little alteration between multiple technology development generations—for example, from a 7 nm chipset to a 3 nm chipset.
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